MR - Multiply Register - Opcode 1C
- MR 2,7
The specific syntax is
- MR target register, source register.
|RR Instruction (2 bytes)|
|Byte 1||Byte 2|
|target register||source register|
- The first argument is a one with lesser number of pair of target registers which value is affected by the instruction.
- The second argument is the source value register.
The MR instruction is available on all models of the 360, 370 and z/System.
The MR instruction does multiply of two signed 32-bit integers. The first multiplicand is got from the general register T+1, where T is number of the target register (first operand). The second multiplicand is got from the source register (second operand). The resulting product as 64-bit signed value is then placed into registers T (most significand 32 bits) and T+1 (least significand 32 bits). The target register number T shall be even.
The Condition Code field in the Program Status Word is not changed.
Exceptions and FaultsEdit
- If an odd register number is specified as the target register, operation exception occurs.
Getting first multiplicand from T+1 instead of T, where T is target register number, can be confusing for program code reader. For example, "MR 2,2" multiplies values of registers 2 and 3, but "MR 2,3" calculates square of value of register 3.
- To multiply by word value from memory, see M.
- To divide by word value from register, see DR.
- To add word value from register, see AR.
- To add value and set condition codes according to unsigned arithmetic, or add not most significant part of multi-word integer value, see AL or ALR.
- To multiply floating-point values, see MER, MDR, ME or MD.
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