Programmable Logic/Cores and IP
Programmable logic cores or IP are pre-designed logic blocks that implement a certain functionality. The can be blocks that are embedded in the FPGA fabric (Hard Cores) or predesigned and debugged blocks that are implemented using the FPGA fabric (Soft Cores).
Cores and IP
edit| This page or section is an undeveloped draft or outline. You can help to develop the work, or you can ask for assistance in the project room. |