360 Assembly/360 Instructions/LCR

LCR - Load Register Complement - RR Instruction - Opcode 13


LCR 2,6 Copy the two's complement (integer negation) of contents of register 6 into register 2, replacing the existing contents of register 2

The specific syntax is

LCR target register, source register.


RR Instruction (2 bytes)
Byte 1
bits (0-7)
Byte 2
target register
source register
(in hex) Opcode
(4 bits)
0..F / (dec 0..15)
(4 bits)
0..F / (dec 0..15)
  • The first argument is a target register which value is affected by the instruction.
  • The second argument is the source register.
  • The target register and source register values are 0 to 15.

Example usage


The LCR instruction is used to copy the integer negation of the second register argument (the source register) into the first register argument (the target register), replacing the contents of the target register with the contents of the source register. The following is an example of how the instruction would assemble in various forms from an assembly language listing:

1326        LCR   2,6
1392        LCR   9,2
13FA        LCR   15,10

Typical Usage


When it is necessary to negate a 32-bit integer value.



The LCR instruction is available on all models of the 360, 370 and z/System.



The LCR instruction copies negation of the 32-bit value from the register specified by the second argument to the register specified by the first argument.

Register 0 is valid for either register and is not ignored as in some other instructions.

Condition Codes


If signed integer overflow occurs, i.e. source is -2147483648 (hex 80000000), CC is set to 3. Otherwise, CC is set to 0, 1 or 2, if sum is equal to zero, below zero or above zero accordingly.

Exceptions and Faults

  • If signed integer overflow is detected and the bit 36 in PSW is set, operation exception occurs.
  • To subtract an integer value from register, see SR, S, SH, SL or SLR.
  • To load and complement 64-bit integer value, see LCGR.
  • To load and complement 32-bit integer value and extend it to 64 bits, see LCGFR.
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