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English: Pinout diagram of the 4023 triple NAND gate logic IC.
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Author Inductiveload
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21 September 2009

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Date/TimeThumbnailDimensionsUserComment
current12:26, 18 October 2009Thumbnail for version as of 12:26, 18 October 2009220 × 220 (76 KB)Inductiveloadfix typo
22:14, 21 September 2009Thumbnail for version as of 22:14, 21 September 2009220 × 220 (76 KB)Inductiveload{{Information |Description={{en|1=Pinout diagram of the 4023 triple NAND gate logic IC.}} |Source=Own work by uploader |Author=Inductiveload |Date=2009-09-21 |Permission={{PD-self}} |other_versions= }} [[Category:IC Pinout Diagrams

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