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Digital Circuits/DDS

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A Direct Digital Synthesizer (DDS) allows to create a periodic waveform whose frequency is controlled by a number.



The frequency of the DDS output is as stable as the quartz the circuit is clocked with. The frequency steps can be very small and the frequency value ranges up to the half of the clock frequency.

DDS can be used to realize function generators or oscillators within more complex circuits such as mixers, modulators and phase-locked loops.


A DDS is a free-running counter. When the counter reaches its maximal value, it folds back to zero.

The circuit output cant be 3-fold:

  • The counter output provides a sawtooth signal of programmable frequency
  • The couner MSB provides a binary signal with the same frequency
  • Considering the sawtooth output as a phase signal allows to calculate trigonometric functions and delivering a sine or even quadrature sine and cosine outputs

The sine and cosine values have been traditionally obtained with the help of ROM or Look-Up Tables (LUT). However, the CORDIC operator calculates these functions with the same level of accuracy together with a highly reduced hardware cost.

Principle of operationEdit

If the counter increments by 1 at every rising clock edge, its shape will be a sawtooth of period


and have a frequency of


If the counter increments by   at every rising clock edge, it will count   times faster and have a frequency of


Output signalsEdit

The counter itself provides a sawtooth signal. The counter MSB provides a square signal. A sinewave output can be produced considering the sawtooth as a phase signal. The sine function can be computed with the help of the CORDIC operator.

The following figure shows the time signals of a DDS.

The Fourier transform of the square and sine waves is given in the following figure.

The sinewave gives the two blue peaks, as expected. The square wave is a periodic signal and has only odd harmonics.

Odd-valued stepsEdit

The preceeding figures have been made with a nice step value: 16. When the step value doesn't exactly divide the counter range, the teeth of the sawtooth are more ragged and the square wave output shows a kind of jitter: its mean frequency is the desired one but the signal edges are shifted to the closest active clock edge.

The following figure shows the time signals of a DDS with an odd-valued step.

The Fourier transform of the square and sine waves is given in the following figure.

The sinewave remains a pure tone. The square wave shows much more frequency content.


The DDS circuit can be very efficiently implemented in programmable circuits such as FPGAs. It is built out of a counter followed by a block calculating a sine from the counter output which is considered as a phase. The calculation of the sine is best done using the CORDIC algorithm.

The VHDL source for a DDS can be found on opencores. This implementation prefers to calculate the sine function with the help of lookup tables rather than with CORDIC.