A-level Computing/WJEC (Eduqas)/Component 1/Logical operations

Logic Gates edit

For any decision making and calculation done by the computer on the hardware level, logic gates are used. A logic gate takes a binary input, which can either be a 1 ('switched' on/true) or a 0 ('switched' off/false). The input is then processed to give an out a binary output.

AND edit

 
A diagram of an AND gate.

The AND logic gate requires both inputs to be 1 for the output to be 1 and is represented with a point ('.'), any other combinations produce an output of 0, this is demonstrated in the truth table below.

Input Output
A B A.B
0 0 0
0 1 0
1 0 0
1 1 1

OR edit

 
An OR gate.A and B are the inputs and Q is the output.

The OR logic gate requires only one input to be 1 for the output to be 1 and is represented with a plus symbol ('+'), any other combinations including a 1 will also produce an output of 1, see the truth table.

Input Output
A B A+B
0 0 0
0 1 1
1 0 1
1 1 1

NOT edit

 
A traditional diagram of a NOT gate.

The NOT (Negation) logic gate, sometimes referred to as an Inverter, flips any input that it receives. For example, if a 1 is input, a 0 will be output and vice versa. It is represented using a line above the input that is being inverted.

Input Output
A NOT A
0 1
1 0

XOR edit

 
A XOR gate, where only one input can be 1 for the output to be 1.

The XOR (Exclusive OR) logic gate works exactly how it states in its name. Only one input can be a 1 and if any more are 1, or they are all 0, the gate will not return a 1. It is represented using a circle with a plus symbol within the circle.

Input Output
A B A XOR B
0 0 0
0 1 1
1 0 1
1 1 0

NAND edit

 
A NAND gate.

The NAND (NOT-AND) gate simply flips the logic of an AND gate. Any combination of numbers that isn't a AND, will produce a 1 whereas an AND combination will produce a 0. This is represented as A.B with a line over the two.

Input Output
A B A NAND B
0 0 1
0 1 1
1 0 1
1 1 0

NOR edit

 
A NOR gate.

The NOR (NOT-OR) gate flips the logic of an OR gate. The one combination which doesn't meet the OR gate logic is a 1, where both inputs are 0. This is represented as A+B with a line over the two.

Input Output
A B A NOR B
0 0 1
0 1 0
1 0 0
1 1 0

Application of Logical Operations edit

Masking edit

Masking is used to work out the state of a bit, which can either be a 0 or a 1. In the example below, the AND logical operator is used to determine the state of the 3rd most significant bit.

 AND

 Mask

___________

 

Clearing edit

Clearing is used to reset the contents of a register to all 0s. This can be done using the AND logical operation or the XOR logical operation. You need to know both for the exam.

AND XOR
 AND

 Mask

___________

 Cleared Register

 XOR

 Mask

___________

 Cleared Register

Encryption edit

Encryption converts data into ciphertext. This cannot be read unless the original key used to encrypt the data is known, the process of decryption. To encrypt and decrypt data, the XOR logical operator is used on the ciphertext.

Encryption Decryption
 XOR

 Key

___________

 Ciphertext

 XOR

 Key

___________

 Original Data

Simplification of Boolean Expressions edit

Boolean Identities edit

De Morgan's Law edit