File:Buffer IEC.svg
Size of this PNG preview of this SVG file: 100 × 50 pixels. Other resolutions: 320 × 160 pixels | 640 × 320 pixels | 1,024 × 512 pixels | 1,280 × 640 pixels | 2,560 × 1,280 pixels.
Original file (SVG file, nominally 100 × 50 pixels, file size: 5 KB)
File history
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 18:11, 21 December 2008 | 100 × 50 (5 KB) | Inductiveload | {{Information |Description= |Source= |Date= |Author= |Permission= |other_versions= }} | |
11:03, 19 December 2008 | 100 × 50 (5 KB) | Inductiveload | {{Information |Description= |Source= |Date= |Author= |Permission= |other_versions= }} | ||
04:32, 21 May 2007 | 110 × 60 (4 KB) | Jjbeard | Made square (according to IEEE 91-1984 2.2, they can be any height/width ratio. However, square seems to be the convetion used for single gates in this standard. Also made larger to allow use at 100% scaling and made the outline 3px for clarity. The text | ||
12:38, 2 June 2006 | 50 × 30 (3 KB) | Jjbeard | {{Information |Description=IEC Symbol for a Buffer |Source=Own Drawing, made in Inkscape 0.43 |Date=2/06/06 |Author=jjbeard |Permission=PD |other_versions= }} Category:IEC_Logic_Gates | ||
12:35, 2 June 2006 | 50 × 30 (3 KB) | Jjbeard | {{Information |Description=IEC Symbol for a Buffer |Source=Own Drawing, made in Inkscape 0.43 |Date=2/06/06 |Author=jjbeard |Permission=PD |other_versions= }} Category:IEC_Logic_Gates |
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