File:Bang-bang PFD acquisition.png

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Summary

Description
English: Simulation with 3000 time steps.

The waveforms of the two Phase Detector are shown at the top, translated higher not to interfere with the analog waveforms. Neither the line pulse sequence nor its frequency are used in the simulation of the waveforms of the voltages and angular values depicted. Therefore the Q clock operation is simulated by the trick of replicating at the PD2 input the input signal phase with a 90° shift. Initially (100 time steps) no signal is present, LOS is asserted and the VCO runs free. Then the signal appears (LOS=0), and the frequency locks begins. The PD1 and PD2 gains correspond to the maximum transition density, to simplify the simulation and to shorten the acquisition for easier fitting inside the figure. After about half a micro sec the square waves coming from the two PDs widen clearly their periods and the filter output follows a linear ramp towards the driving voltage that brings the VCO at the lock frequency. After a little more than 3 micro sec the acquisition is complete, with some phase undershoot. The bang-bang tracking begins, and the output phase tracks the input (that is slightly lower than its nominal frequency). The error function becomes stable at about -50 rad, that correspond to the slips before lock.

A little before 6 micro sec have elapsed, a substantial input sinusoidal jitter appears. The filter output shows that the limits of tracking ability are slightly exceeded during every jitter cycle. But not much, as the error function does not show a strong evidence of it.
Date
Source Own work
Author BORGATO Pierandrea

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23 March 2014

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