Last modified on 14 September 2013, at 13:46

User:1sfoerster/Papilio one tutorial

The goal of this book is to develop a two credit, all lab, FPGA course using the papilo one. Because it is open source, the papilio will be contrasted with a proprietary competitor: Digilent's Nexys2.

Development BoardsEdit

Development boards exist to educate engineers. Vendors keep their costs down to encourage engineers to experiment with their products. They are not meant to do anything in particular except demonstrate the design features of a CPU or FPGA. New circuits are meant to be designed with the FPGA chip, not the Nexys2 or Papilio. The Papilio is a bit different in that it can be purchased without the LogicStart MegaWing and configured like an Arduino and thus enter into prototypes and one-of-a-kind/one-off projects. Every year the FPGA market increases as FPGAs replace more traditional application-specific integrated circuit (ASIC) chips in commercial electronic devices. Here is a video talking about these issues in more detail.

VHDLEdit

There are two major aspects of this course, learning the programming language VHDL of these boards, and implementing the VHDL on a development board.

DesignEdit

Projects in this class have already been conceived. Your goal is to implement them using the design techniques you learned in a standard digital class. The course starts off with two ASIC labs and then migrates to the FPGA implementations. Your goal is to design, simulate, implement and test each of the conceived projects. Design is typically done in a notebook. Simulation is done in software. Implementation is done with the Papilio and/or Nexys2. Testing is done with a digital/logic analyzer including the Digilent EE, Agilent MSO and ....