Last modified on 28 April 2007, at 13:54

# SPARC Assembly/Arithmetic Instructions

## Arithmetic InstructionsEdit

These are the basic operations used for addition, subtraction, and multiplication. Note that any of these arithmetic instructions may take a register or an immediate value as the op2 parameter. All other parameters (rd and rs1 must be registers).

 Instruction: add

Adds rs1 and op2, and stores result in rd.

 Instruction: addcc

Same as above, except that it sets the condition codes.

 Instruction: sub

subtracts op2 from rs1, and stores the difference in rd

 Instruction: subcc

same as above, except that it sets the condition codes.

 Instruction: mulcc

Performs a single step in the multiplication operation. Stores partial results in register Y. Complete multiplication algorithms are discussed in more detail later.

### Extended PrecisionEdit

These instructions account for the carry bit setting, so that large numbers (larger then the machine word) can be virtually manipulated as a single entity.

 Instruction: addx

Performs extended addition (adds two operands and carry bit), and stores result in rd.

 Instruction: addxcc

Same as above, but sets the condition codes.

 Instruction: subx

Performs extended subtractions (subtracts op2 and C from rs1) and stores result in rd.

 Instruction: subxcc

same as above, but sets the condition codes.

### Tagged InstructionsEdit

 Instruction: tsubcc
 Instruction: tsubcctv
 Instruction: taddcc
 Instruction: taddcctv

### Y RegisterEdit

These operations affect the Y register.

 Instruction: rdy

reads the contents of the Y register in to the rd destination register

 Instruction: wry

exclusively ORs the rs1 and op2 values, and stores that result in the Y register.

## Logic InstructionsEdit

 Instruction: and

performs the bitwise AND of rs1 and op2, and stores the result in rd.

 Instruction: andcc

same as above, sets the condition codes.

 Instruction: or

performs the bitwise OR of rs1 and op2, and stores the result in rd.

 Instruction: orcc

same as above, sets the condition codes.

 Instruction: xor

performs the bitwise XOR, between rs1 and op2. stores the result in rd.

 Instruction: xorcc

same as above, sets the condition codes.

 Instruction: xnor

performs the bitwise XNOR between rs1 and op2. puts result in rd.

 Instruction: xnorcc

same as above, sets condition codes.

### Inverted Logic OperationsEdit

 Instruction: andn

ANDs rs1 and the bitwise inverse of op2. stores result in rd.

 Instruction: andncc

same as above, sets condition codes.

 Instruction: orn

ORs rs1 and the bitwise inverse of op2. stores the result in rd.

 Instruction: orncc

same as above, sets the condition codes.

## Shift InstructionsEdit

 Instruction: sll

performs the logical left-shift of rs1. Shift amount is according to value of op2. result is stored in rd.

 Instruction: srl

performs the logical right-shift of rs1. Shift amount is the value of op2. stores the result into rd.

 Instruction: sra

performs the arithmetic right-shft of rs1. shift amount is the value of op2. stores the result in rd.